Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10993604
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/26/2005
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Inventors:
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Katsuyuki Torii, Ryoji Takahashi
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Title:
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INSULATED GATE BIPOLAR TRANSISTOR HAVING A REDUCED TAIL CURRENT AND METHOD OF FABRICATING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 6-3, KITANO 3-CHOME, NIIZA-SHI |
| SAITAMA, JAPAN 352-8666 |
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| RICHARD T. OGAWA |
| TOWNSEND AND TOWNSEND AND CREW, LLP |
| TWO EMBARCADERO CENTER |
| EIGHTH FLOOR |
| SAN FRANCISCO, CA 94111-3834 |
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Assignment:
2
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RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
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| 5800 W. GRAND RIVER |
| LANSING, MICHIGAN 48906 |
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| HAYLEY SMITH, SENIOR LEGAL ASSISTANT |
| KIRKLAND & ELLIS LLP |
| 601 LEXINGTON AVENUE |
| NEW YORK, NY 10022 |
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