Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2006
|
Application #:
|
10838230
|
Filing Dt:
|
05/05/2004
|
|
Inventors:
|
Srinath Krishnan, William George En
|
|
Title:
|
DUAL PURPOSE TEST STRUCTURE FOR GATE-BODY CURRENT MEASUREMENT IN PD/SOI AND FOR DIRECT EXTRACTION OF PHYSICAL GATE LENGTH IN SCALED CMOS TECHNOLOGIES
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| ONE AMD PLACE |
| P.O. BOX 3453 |
| SUNNYVALE, CALIFORNIA 94088-3453 |
|
|
|
|
| MCDERMOTT, WILL & EMERY |
| KEITH E. GEORGE |
| 600 13TH STREET, N.W. |
| WASHINGTON, D.C. 20005-3096 |
|
|
Search Results as of:
05/22/2024 08:53 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
