Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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12/26/2006
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Application #:
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10766955
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Filing Dt:
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01/30/2004
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Publication #:
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Pub Dt:
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07/07/2005
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Inventors:
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Hiroyuki Yamashita, Takao Shinsha, Hideaki Fujikake, Toshiaki Kowatari, Tomoya Hirao et al
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Title:
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A METHOD FOR CO-VERIFYING HARDWARE AND SOFTWARE FOR A SEMICONDUCTOR DEVICE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 17-2, SHIN-YOKOHAMA 3-CHOME |
| KOHOKU-KU YOKOHAMA-SHI |
| KANAGAWA, JAPAN |
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| STAAS & HALSEY, LLP |
| ATTENTION: H. J. STAAS |
| 1201 NEW YORK, AVE., N.W., SUITE 700 |
| WASHINGTON, D.C. 20005 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 4-1, NISHISHINJUKU 2-CHOME |
| SHINJUKU-KU, TOKYO 163-0811, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: H.J. STAAS |
| 1201 NEW YORK AVE., N.W.7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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