Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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10441691
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Filing Dt:
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05/19/2003
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Publication #:
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Pub Dt:
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08/05/2004
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Inventors:
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Kuen-Jong Lee, Jih-Jeen Chen, Cheng-Hua Huang
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Title:
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TEST METHOD AND ARCHITECTURE FOR CIRCUITS HAVING INPUTS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 18TH FLOOR, NO. 106, SECTION 2, HO-PING E. ROAD |
| TAIPEI,300, TAIWAN ROC |
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| BEVER, HOFFMAN & HARNS, LLP |
| PATRICK T. BEVER, ESQ. |
| 2099 GATEWAY PLACE, SUITE 320 |
| SAN JOSE, CA 95110 |
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