Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/09/2007
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Application #:
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10269588
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Filing Dt:
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10/12/2002
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Publication #:
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Pub Dt:
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02/27/2003
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Inventors:
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Toshiya Sasaki, Kazuyoshi Uchiyama, Masahiko Kawaguchi, Keishiro Amaya, Eita Tamezawa
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Title:
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METHOD OF MANUFACTURING AN ELECTRONIC COMPONENT INCLUDING AN INTER-LINE INSULATING LAYER AND A CONDUCTOR PATTERN
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 10-1 HIGASHIKOTARI 1-CHOME |
| NAGAOKAKYO-SHI, KYOTO-FU, JAPAN 617-8555 |
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| KEATING & BENNETT, LLP |
| 8180 GREENSBORO DRIVE |
| SUITE 850 |
| MCLEAN, VA 22102 |
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