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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
07/03/2007
Application #:
10798475
Filing Dt:
03/10/2004
Publication #:
Pub Dt:
09/15/2005
Inventor:
Yi Ding
Title:
FABRICATION OF CONDUCTIVE LINES INTERCONNECTING CONDUCTIVE GATES IN NONVOLATILE MEMORIES, AND NON-VOLATILE MEMORY STRUCTURES
Assignment: 1
Reel/Frame:
015080/0423Recorded: 03/10/2004Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
03/05/2004
Assignee:
3F, NO.19, LI-HSIN ROAD, SCIENCE-BASED INDUSTRIAL
PARK
HSINCHU CHU CITY, TAIWAN
Correspondent:
MACPHERSON, KWOK, CHEN ET.AL.
MICHAEL SHENKER
1762 TECHNOLOGY DRIVE, SUITE 226
SAN JOSE, CA 95110

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