Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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10651789
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Filing Dt:
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08/29/2003
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Inventors:
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Qiang Wang, Sudip K. Nag, Srinivasan Dasasathyan, James L. Saunders, Pavanish Nirula
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Title:
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AUTOMATED LOCAL CLOCK PLACEMENT FOR FPGA DESIGNS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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2100 LOGIC DRIVE |
SAN JOSE, CALIFORNIA 95124 |
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XILINX, INC. |
KIM KANAKI |
2100 LOGIC DRIVE |
SAN JOSE, CA 95124 |
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