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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
07/24/2007
Application #:
11065750
Filing Dt:
02/24/2005
Publication #:
Pub Dt:
08/25/2005
Inventors:
Kun-Ho Kwak, Jae-Hoon Jang, Soon-Moon Jung, Byung-Jun Hwang, Won-Seok Cho, Sung-Jin Kim et al
Title:
METHODS OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUITS USING SELECTIVE EPITAXIAL GROWTH AND PARTIAL PLANARIZATION TECHNIQUES AND SEMICONDUCTOR INTEGRATED CIRCUITS FABRICATED THEREBY
Assignment: 1
Reel/Frame:
016025/0865Recorded: 04/07/2005Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
02/23/2005
Exec Dt:
02/23/2005
Exec Dt:
02/23/2005
Exec Dt:
02/23/2005
Exec Dt:
02/23/2005
Exec Dt:
02/23/2005
Exec Dt:
02/23/2005
Exec Dt:
02/23/2005
Assignee:
416 MAETAN-DONG, YEONGTONG-GU
SUWON-SI, GYEONGGI-DO (SOUTH), KOREA, REPUBLIC OF
Correspondent:
MARGER JOHNSON & MCCOLLOM, P.C.
1030 S.W. MORRISON STREET
PORTLAND, OREGON 97205

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