Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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10529539
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Filing Dt:
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03/29/2005
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Publication #:
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Pub Dt:
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03/09/2006
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Inventors:
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Hiroyuki Yoshikawa, Shunsuke Hirano
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Title:
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WIDE-BAND MODULATION PLL, TIMING ERROR CORRECTION SYSTEM OF WIDE-BAND MODULATION PLL, MODULATION TIMING ERROR CORRECTION METHOD AND METHOD FOR ADJUSTING RADIO COMMUNICATION APPARATUS HAVING WIDE-BAND MODULATION PLL
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006, OAZA KADOMA |
| KADOMA-SHI, OSAKA, JAPAN 571-8501 |
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| JEFFREY J. SOPKO |
| 1801 EAST 9TH STREET |
| SUITE 1200 |
| CLEVELAND, OH 44114-3108 |
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