Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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10880181
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Filing Dt:
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06/28/2004
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Inventors:
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Tathagato Rai Dastidar, Partha Ray
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Title:
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METHOD AND SYSTEM FOR DEVICE LEVEL SIMULATION OF LARGE SEMICONDUCTOR MEMORIES AND OTHER CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2900 SEMICONDUCTOR DRIVE |
| M/S D3-579 |
| SANTA CLARA, CALIFORNIA 95051-8090 |
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| GIRARD & EQUITZ, LLP |
| ALFRED A. EQUITZ |
| 400 MONTGOMERY STREET #1110 |
| SAN FRANCISCO, CA 94104 |
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