Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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10999065
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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02/02/2006
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Inventors:
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Mie Tonosaki, Tomoyuki Okawa
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Title:
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SECOND-CACHE DRIVING/CONTROLLING CIRCUIT, SECOND CACHE, RAM, AND SECOND-CACHE DRIVING/CONTROLLING METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA 4-CHOME |
| NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA, JAPAN 211-8588 |
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| STAAS & HALSEY LLP |
| GENE M. GARNER II |
| 1201 NEW YORK AVE., N.W., SUITE 700 |
| WASHINGTON, DC 20005 |
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Assignment:
2
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RECORD TO CORRECT THE DOCUMENT DATES FOR THE CONVEYING PARTIES, PREVIOUSLY RECORDED AT REEL 016044, FRAME 0315.
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| 1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA 211-8588, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: GENE M. GARNER, II |
| 1201 NEW YORK AVE., N.W., SUITE 700 |
| WASHINGTON, D.C. 20005 |
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