Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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04/07/2009
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Application #:
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11521138
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Filing Dt:
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09/14/2006
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Publication #:
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Pub Dt:
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08/30/2007
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Inventors:
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Katsumi Homma, Toshiyuki Shibuya, Hidetoshi Matsuoka, Izumi Nitta
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Title:
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CIRCUIT DELAY ANALYZING METHOD, CIRCUIT DELAY ANALYZING APPARATUS, AND COMPUTER PRODUCT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU |
KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN |
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PATRICK G. BURNS |
GREER, BURNS & CRAIN, LTD. |
300 SOUTH WACKER DRIVE |
SUITE 2500 |
CHICAGO, IL 60606 |
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