Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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06/09/2009
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Application #:
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10438986
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Filing Dt:
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05/16/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Inventors:
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Shinichiro Tago, Tomohiro Yamana, Yoshimasa Takebe
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Title:
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Information processor having delayed branch function with storing delay slot information together with branch history information
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODNAKA, 4-CHOME, NAKAHARA-KU |
| KAWASAKI-KU, KANAGAWA, JAPAN 211-8588 |
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| STAAS & HALSEY LLP |
| DAVID M. PITCHER |
| 700 11TH STREET, N.W. |
| SUITE 500 |
| WASHINGTON, DC 20001 |
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Assignment:
2
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CORRECTIVE TO CORRECT THE SECOND AND THIRD INVENTORS EXECUTION DATES PREVIOUSLY RECORDED AT REEL 014086 FRAME 0131. (ASSIGNMENT OF ASSIGNOR'S INTEREST)
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| 1-1, KAMIKODANAKA, 4-CHOME |
| NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA 211-8588, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: DAVID M. PITCHER |
| 1201 NEW YORK AVENUE, N.W. |
| SUITE 700 |
| WASHINGTON, D.C. 20005 |
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Assignment:
3
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CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED ON REEL 015266 FRAME 0958. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF THE ENTIRE INTEREST.
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| NO. 1003 UNITE CHVIL BLDG., |
| 1141-2 BAEKSEOK-DONG, IISAN-GU |
| GOYANG-CITY, GYEONGGI-DO, KOREA, REPUBLIC OF 411-722 |
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| SHERDAN ROSS P.C. |
| 1560 BROADWAY, SUITE 1200 |
| DENVER, CO 80202-5141 |
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