Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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04/20/2010
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Application #:
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12074467
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Filing Dt:
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03/03/2008
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Inventors:
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Francis Man-Chit Chow, Rakesh H. Patel, Erhard Joachim Pistorius
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Title:
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STACKED DIE NETWORK-ON-CHIP FOR FPGA
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 101 INNOVATION DRIVE |
| SAN JOSE, CALIFORNIA 95134 |
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| WEAVER AUSTIN VILLENEUVE & SAMPSON LLP |
| ATTN: ALTERA |
| P.O. BOX 70250 |
| OAKLAND, CA 94612-0250 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2200 MISSION COLLEGE BOULEVARD |
| SANTA CLARA, CALIFORNIA 95054 |
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| ANGELA MILLER |
| C/O CLARIVATE |
| P.O. BOX 5427 |
| TUCSON, AZ 85703 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| BLANCHARDSTOWN CORPORATE PARK 2 |
| PLAZA 255, SUITE 2A |
| DUBLIN, IRELAND D15 YH6H |
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| TAHOE RESEARCH, LTD. |
| BLANCHARDSTOWN CORPORATE PARK 2 |
| PLAZA 255, SUITE 2A |
| DUBLIN, D15 YH6H IRELAND |
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