Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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04/20/2010
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Application #:
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11397899
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Filing Dt:
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04/05/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Inventors:
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Masayuki Arai, Kazuhiko Iwasaki, Satoshi Fukumoto, Takeshi Shoda, Junichi Nishimoto
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING TEST CONFIGURATION AND TEST METHOD FOR THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 17-2, SHIN YOKOHAMA 3-CHOME, KOUHOKU-KU, YOKOHAMA-SHI |
| KANAGAWA 222-0033, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: H.J. STAAS |
| 1201 NEW YORK AVENUE, N.W., 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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