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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
06/29/2010
Application #:
12356797
Filing Dt:
01/21/2009
Inventors:
Sridhar Narayanan, Sridhar Subramanian, Chaiyasit Manovit, Gerald Gras
Title:
METHOD AND APPARATUS TO CLOCK-GATE A DIGITAL INTEGRATED CIRCUIT BY USE OF FEED-FORWARD QUIESCENT INPUT ANALYSIS
Assignment: 1
Reel/Frame:
022128/0934Recorded: 01/21/2009Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
01/21/2009
Exec Dt:
01/21/2009
Exec Dt:
01/21/2009
Exec Dt:
01/21/2009
Assignee:
3940 FREEDOM CIRCLE
#406
SANTA CLARA, CALIFORNIA 95054
Correspondent:
FERNANDEZ & ASSOCIATES LLP
1047 EL CAMINO REAL
SUITE 201
MENLO PARK, CA 94025
Assignment: 2
Reel/Frame:
023033/0542Recorded: 07/30/2009Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
07/24/2009
Assignee:
2100 LOGIC DRIVE
SAN JOSE, CALIFORNIA 95124
Correspondent:
XILINX, INC.
2100 LOGIC DRIVE
SAN JOSE, CA 95124

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