Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12453612
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Filing Dt:
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05/15/2009
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Publication #:
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Pub Dt:
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11/19/2009
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Inventor:
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Hiromi Kojima
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Title:
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METHOD OF GENERATING TEST CONDITION FOR DETECTING DELAY FAULTS IN SEMICONDUCTOR INTEGRATED CIRCUIT AND APPARATUS FOR GENERATING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| MAKUHARI TECHNO GARDEN B5 |
| 1-3, NAKASE, MIHAMA-KU |
| CHIBA 261-8501, JAPAN |
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| JAMES A. OLIFF |
| OLIFF & BERRIDGE, PLC |
| P.O. BOX 320850 |
| ALEXANDRIA, VA 22320-4850 |
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Assignment:
2
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| GORENJSKA CESTA 23 |
| MENGE?, SLOVENIA 1234 |
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| MARK A. LITMAN & ASSOCIATES, P.A. |
| 7001 CAHILL ROAD, STE. 15A |
| EDINA, MN 55439 |
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