Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13742638
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Filing Dt:
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01/16/2013
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Publication #:
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Pub Dt:
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07/25/2013
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Inventor:
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Atsushi YASUNAKA
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Title:
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HIGH-LEVEL SYNTHESIS DEVICE, HIGH-LEVEL SYNTHESIS METHOD, HIGH-LEVEL SYNTHESIS PROGRAM, AND INTEGRATED CIRCUIT DESIGN METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-10-23 SHIN-YOKOHAMA |
| KOHOKU-KU, YOKOHAMA-SHIM, |
| KANAGAWA 222-0033, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: GENE M. GARNER, II |
| 1201 NEW YORK AVE. 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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Assignment:
2
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PLEASE RECORD TO CORRECT ASSIGNEE'S LOCATION TO SPECIFY:FUJITSU SEMICONDUCTOR LIMITED 2-10-23 SHIN-YOKOHAMA,KOHOKU-KU,YOKOHAMA-SHI,KANAGAWA 222-0033 JAPAN,PREVIOUSLY RECORDED AT REEL 029860,FRAME 0977.
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| 2-10-23 SHIN-YOKOHAMA, |
| KOHOKU-KU, YOKOHAMA-SHI, |
| KANAGAWA 222-0033, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: GENE M. GARNER, II |
| 1201 NEW YORK AVE., N.W., 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-10-23 SHIN-YOKOHAMA, KOHOKU-KU |
| YOKOHAMA-SHI, KANAGAWA, JAPAN 222-0033 |
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| ARENT FOX LLP |
| 1717 K STREET, N.W. |
| WASHINGTON, DC 20006 |
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