Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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12198704
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Filing Dt:
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08/26/2008
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Publication #:
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Pub Dt:
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03/05/2009
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Inventors:
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Yoshiteru OHNUKI, Hideo Yamashita
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Title:
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DEBUGGING MECHANISM HAVING AN OR CIRCUIT FOR TRIGGERING STORAGE OF ARITHMETIC OPERATION DATA WHENEVER A VALID CONTROL SIGNAL IS RECEIVED OR A CLOCK-BASED COUNTER OVERFLOWS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA 4-CHOME |
| NAKAHARA-KU, KANAGAWA |
| KAWASAKI-SHI, JAPAN 211-8588 |
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| STAAS & HALSEY, LLP |
| 1201 NEW YORK AVENUE, NW |
| SUITE 700 |
| WASHINGTON, DC 20005 |
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