Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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04/22/2014
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Application #:
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13812011
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Filing Dt:
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01/24/2013
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Publication #:
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Pub Dt:
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05/23/2013
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Inventors:
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Takashi Morimoto, Takashi Hashimoto
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Title:
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THREE-DIMENSIONAL INTEGRATED CIRCUIT HAVING REDUNDANT RELIEF STRUCTURE FOR CHIP BONDING SECTION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006 OAZA KADOMA, KADOMA-SHI |
| OSAKA, JAPAN 571-8501 |
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| PANASONIC PATENT CENTER |
| 1130 CONNECTICUT AVE., N.W., SUITE 1100 |
| WASHINGTON, DC 20036 |
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