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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
8937374
Issue Dt:
01/20/2015
Application #:
14003816
Filing Dt:
09/09/2013
Publication #:
20140077345
Pub Dt:
03/20/2014
Inventors:
Takashi Uno, Hikaru Ikeda, Kazuhiro Yahata, Motoyoshi Iwata, Hiroshi Naitou et al
Title:
SEMICONDUCTOR PACKAGE, METHOD AND MOLD FOR PRODUCING SAME, INPUT AND OUTPUT TERMINALS OF SEMICONDUCTOR PACKAGE
Assignment: 1
Reel/Frame:
032199/0242Recorded: 02/12/2014Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
UNO, TAKASHI
Exec Dt:
08/23/2013
IKEDA, HIKARU
Exec Dt:
09/02/2013
YAHATA, KAZUHIRO
Exec Dt:
08/23/2013
IWATA, MOTOYOSHI
Exec Dt:
08/26/2013
NAITOU, HIROSHI
Exec Dt:
08/26/2013
KAMIYAMA, TOMOHIDE
Exec Dt:
08/23/2013
Assignee:
PANASONIC CORPORATION
1006, OAZA KADOMA, KADOMA-SHI
OSAKA, JAPAN 571-8501
Correspondent:
PANASONIC CORPORATION
2-1-61, SHIROMI, CHUO-KU
7F OBP PANASONIC TOWER
OSAKA, 540-6207 JAPAN
Assignment: 2
Reel/Frame:
052755/0917Recorded: 05/27/2020Pages: 65
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
PANASONIC CORPORATION
Exec Dt:
05/21/2020
Assignee:
PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
1, KOTARI-YAKEMACHI, NAGAOKAKYO-SHI,
KYOTO, JAPAN 617-8520
Correspondent:
CPA GLOBAL LIMITED
LIBERATION HOUSE
CASTLE STREET
ST HELIER, JEI IBL JERSEY

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