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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
02/17/2015
Application #:
13800626
Filing Dt:
03/13/2013
Publication #:
Pub Dt:
08/01/2013
Inventors:
Mill-Jer WANG, Hao CHEN, Hung-Chih LIN, Ching-Nen PENG
Title:
METHOD OF TESTING THROUGH SILICON VIAS (TSVS) OF THREE DIMENSIONAL INTEGRATED CIRCUIT (3DIC)
Assignment: 1
Reel/Frame:
029986/0979Recorded: 03/13/2013Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
01/10/2011
Exec Dt:
01/10/2011
Exec Dt:
01/10/2011
Exec Dt:
01/10/2011
Assignee:
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300
Correspondent:
LOWE HAUPTMAN HAM & BERNER, LLP (TSMC)
2318 MILL ROAD
SUITE 1400
ALEXANDRIA, VA 22314

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