Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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13923704
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Filing Dt:
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06/21/2013
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Publication #:
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Pub Dt:
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10/31/2013
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Inventors:
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Dureseti Chidambarrao, Ramachandran Muralidhar, Philip J. Oldiges, Viorel Ontalus
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Title:
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MINIMIZING LEAKAGE CURRENT AND JUNCTION CAPACITANCE IN CMOS TRANSISTORS BY UTILIZING DIELECTRIC SPACERS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NEW ORCHARD ROAD |
| ARMONK, NEW YORK 10504 |
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| IBM CORP - ENDICOTT DRAFTING CENTER |
| 2070 ROUTE 52 |
| HOPEWELL JUNCTION, NY 12533 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1891 ROBERTSON ROAD |
| SUITE 100 |
| OTTAWA, CANADA K2H 5B7 |
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| ELPIS TECHNOLOGIES INC. |
| 1891 ROBERTSON ROAD |
| SUITE 100 |
| OTTAWA, K2H 5B7 CANADA |
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