Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
Total Assignments:
2
|
Patent #:
|
|
Issue Dt:
|
05/12/2015
|
Application #:
|
13714392
|
Filing Dt:
|
12/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/09/2014
| | | | |
Inventor:
|
Mon-Ren CHENE
|
Title:
|
Verification module apparatus for debugging software and timing of an embedded processor design that exceeds the capacity of a single FPGA
|
|
Assignment:
1
|
|
|
|
CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
7554 NORMANDY WAY |
CUPERTINO, CALIFORNIA 95014 |
|
|
|
BEST INT'L PATENT & TRADEMARK OFFICE (USA) |
P.O. BOX 230970 |
CENTREVILLE, VA 20120 |
|
|
Assignment:
2
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
ROOM 27, 6TH FLOOR, NO. 29&30, LANE 1775, |
QIUSHAN ROAD, SHANGHAI LIN-GANG SPECIAL AREA, |
SHANGHAI, CHINA |
|
|
|
BEST INT'L PATENT & TRADEMARK OFFICE (USA) |
P.O. BOX 230970 |
CENTREVILLE, VA 20120 |
|
|
Search Results as of:
06/01/2024 10:59 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|