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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
06/14/2016
Application #:
14808122
Filing Dt:
07/24/2015
Publication #:
Pub Dt:
11/19/2015
Inventors:
Scott E. Thompson, Lucian Shifren, Michael Duane, Pushkar Ranade, Yujie Liu et al
Title:
Method for Fabricating a Transistor with Reduced Junction Leakage Current
Assignment: 1
Reel/Frame:
037119/0444Recorded: 11/23/2015Pages: 14
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
12/12/2012
Exec Dt:
01/07/2013
Exec Dt:
01/04/2013
Exec Dt:
01/08/2013
Exec Dt:
01/15/2013
Exec Dt:
01/03/2013
Exec Dt:
01/07/2013
Exec Dt:
01/03/2013
Exec Dt:
01/06/2013
Exec Dt:
01/04/2013
Exec Dt:
01/03/2013
Assignee:
130 KNOWLES DRIVE
SUITE D
LOS GATOS, CALIFORNIA 95032
Correspondent:
BRADLEY P. WILLIAMS
2001 ROSS AVENUE SUITE 600
BAKER BOTTS
DALLAS, TX 75201
Assignment: 2
Reel/Frame:
037119/0171Recorded: 11/23/2015Pages: 19
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
02/27/2015
Assignee:
2000 MIZONO, TADO-CHO
KUWANA, MIE, JAPAN 511-0118
Correspondent:
BRADLEY P. WILLIAMS
2001 ROSS AVENUE SUITE 600
BAKER BOTTS
DALLAS, TX 75201

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