Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14171488
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Filing Dt:
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02/03/2014
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Inventors:
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Matthew H. Klein, Chen W. Tseng
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Title:
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CIRCUIT NETWORK WITH AN ERROR DETECTION SYSTEM FOR MITIGATION OF ERROR PROPAGATION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2100 LOGIC DRIVE |
| SAN JOSE, CALIFORNIA 95124 |
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| XILINX, INC. |
| 2100 LOGIC DRIVE |
| ATTN: LEGAL DEPT. |
| SAN JOSE, CA 95124 |
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Assignment:
2
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CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF INVENTOR CHEN W. TSENG ERRONEOUSLY LISTED ON THE PATENT ASSIGNMENT COVER SHEET PREVIOUSLY RECORDED ON REEL 032123 FRAME 0378. ASSIGNOR(S) HEREBY CONFIRMS THE FACT THAT INVENTOR CHEN W. TSENG EXECUTED THE ASSIGNMENT ON 01/23/2014.
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| 2100 LOGIC DRIVE |
| SAN JOSE, CALIFORNIA 95124 |
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| XILINX, INC. |
| 2100 LOGIC DRIVE |
| ATTN: LEGAL DEPT. |
| SAN JOSE, CA 95124 |
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