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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
9798848
Issue Dt:
10/24/2017
Application #:
14475469
Filing Dt:
09/02/2014
Inventors:
Kumar Chidhambara Keshavan, Ambrish Kant Varma, Taranjit Singh Kukal, Rameet Pal et al
Title:
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PERFORMING CHANNEL ANALYSES FOR AN ELECTRONIC CIRCUIT DESIGN INCLUDING A PARALLEL INTERFACE
Assignment: 1
Reel/Frame:
033654/0094Recorded: 09/02/2014Pages: 11
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
KESHAVAN, KUMAR CHIDHAMBARA
Exec Dt:
08/20/2014
VARMA, AMBRISH KANT
Exec Dt:
08/20/2014
KUKAL, TARANJIT SINGH
Exec Dt:
08/21/2014
PAL, RAMEET
Exec Dt:
08/22/2014
GRIFFIN, BRADFORD
Exec Dt:
08/20/2014
WILLIS, KENNETH ROBERT
Exec Dt:
08/20/2014
QI, HUI
Exec Dt:
08/21/2014
Assignee:
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE
SAN JOSE, CALIFORNIA 95134
Correspondent:
VISTA IP LAW GROUP, LLP (CADENCE)
2160 LUNDY AVENUE
SUITE 230
SAN JOSE, CA 95131
Assignment: 2
Reel/Frame:
033715/0220Recorded: 09/10/2014Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
ZENG, XUEGANG
Exec Dt:
09/10/2014
Assignee:
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE
SAN JOSE, CALIFORNIA 95134
Correspondent:
VISTA IP LAW GROUP, LLP
2160 LUNDY AVE., STE. 230
SAN JOSE, CA 95131

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