Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/26/2017
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Application #:
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14675551
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Filing Dt:
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03/31/2015
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Inventors:
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Paul C. Foster, Jinduo Sun, Walter E. Hartong
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Title:
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METHOD AND SYSTEM FOR IMPLEMENTING A REQUIREMENTS DRIVEN CLOSED LOOP VERIFICATION COCKPIT FOR ANALOG CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2655 SEELY AVE. |
| SAN JOSE, CALIFORNIA 95134 |
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| VISTA IP LAW GROUP, LLP (CADENCE) |
| 2160 LUNDY AVE., STE. 230 |
| SUITE 230 |
| SAN JOSE, CA 95131 |
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