Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09781054
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Filing Dt:
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02/08/2001
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Publication #:
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Pub Dt:
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08/30/2001
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Inventor:
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Kazuki Ohno
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Title:
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SEMICONDUCTOR MEMORY HAVING PARALLEL TEST MODE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| MINATO-KU |
| 7-1 SHIBA 5-CHOME |
| TOKYO, JAPAN |
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| WALKER & SAKO, LLP |
| DARRYL WALKER |
| 300 SOUTH FIRST STREET |
| SUITE 235 |
| SAN JOSE, CA 95113 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1753 SHIMONUMABE, NAKAHARA-KU |
| KAWASAKI, KANAGAWA 211-8668, JAPAN |
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| SURHRUE MION, PLLC |
| J. FRANK OSHA |
| 2100 PENNSYLVANIA AVENUE, NW |
| WASHINGTON, DC 20037 |
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