Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09828936
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Filing Dt:
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04/10/2001
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Publication #:
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Pub Dt:
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10/18/2001
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Inventors:
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Satoshi Takahashi, Takashi Hirata, Yoshihide Komatsu, Hironori Akamatsu, Yutaka Terada
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT REALIZING ELECTRICAL INTERFACE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| KADOMA-SHI |
| 1006, OAZA KADOMA |
| OSAKA 571-8501, JAPAN |
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| MCDERMOTT, WILL & EMERY |
| MICHAEL E. FOGARTY |
| 600 13TH ST, N.W. |
| WASHINGTON, DC 20005 |
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Assignment:
2
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| 1006, OAZA KADOMA, KADOMA-SHI |
| OSAKA, JAPAN 571-8501 |
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| PANASONIC CORPORATION |
| 2-1-61, SHIROMI, CHUO-KU |
| 7F OBP PANASONIC TOWER |
| OSAKA, 540-6207 JAPAN |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1, KOTARI-YAKEMACHI, NAGAOKAKYO-SHI, |
| KYOTO, JAPAN 617-8520 |
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| CPA GLOBAL LIMITED |
| LIBERATION HOUSE |
| CASTLE STREET |
| ST HELIER, JEI IBL JERSEY |
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