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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
NONE
Issue Dt:
Application #:
09964499
Filing Dt:
09/28/2001
Publication #:
Pub Dt:
03/28/2002
Inventors:
Kenji Saito, Kazuhiko Sanada
Title:
Semiconductor device with multi-layer wiring and reduced capacitance and manufacturing method thereof
Assignment: 1
Reel/Frame:
012220/0714Recorded: 09/28/2001Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/25/2001
Exec Dt:
09/25/2001
Assignee:
7-1, SHIBA 5-CHOME
MINATO-KU, TOKYO, JAPAN
Correspondent:
SUGHRUE MION ZINN MACPEAK & SEAS, PLLC
J. FRANK OSHA, ESQ.
2100 PENNSYLVANIA AVENUE, NW
SUITE 800
WASHINGTON, DC 20037-3213
Assignment: 2
Reel/Frame:
013764/0362Recorded: 02/25/2003Pages: 9
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
11/01/2002
Assignee:
1753 SHIMONUMABE, NAKAHARA-KU
KAWASAKI, KANAGAWA 211-8668, JAPAN
Correspondent:
SUGHRUE MION, PLLC
2100 PENNSYLVANIA AVENUE, N.W.
WASHINGTON, DC 20037
ATTN: J. FRANK OSHA

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