Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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09855295
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Filing Dt:
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05/14/2001
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Publication #:
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Pub Dt:
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05/02/2002
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Inventors:
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Jed Foy, Cleston Messick, David Lotourette
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Title:
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Method and apparatus for the simultaneous electrical testing of multiple semiconductor devices
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 82 RUNNING HILL ROAD, MS 35-4E |
| SOUTH PORTLAND, MAINE 04106 |
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| TOWNSEND AND TOWNSEND AND CREW LLP |
| MAYUMI MAEDA |
| TWO EMBARCADERO CENTER, 8TH FLOOR |
| SAN FRANCISCO, CALIFORNIA 94111-3834 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 5005 E. MCDOWELL ROAD, MD A700 |
| PHOENIX, ARIZONA 85008 |
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| SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
| 5005 E. MCDOWELL ROAD |
| MD A700 |
| PHOENIX, AZ 85008 |
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