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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
02/11/2003
Application #:
09951506
Filing Dt:
09/14/2001
Publication #:
Pub Dt:
05/16/2002
Inventors:
Jae-dong Lee, Bo-Un Yoon, Kyoung-Mo Yang, Sang-Rok Hah
Title:
METHOD OF CONTROLLING WAFER POLISHING TIME USING SAMPLE-SKIP ALGORITHM AND WAFER POLISHING USING THE SAME
Assignment: 1
Reel/Frame:
012184/0975Recorded: 09/14/2001Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/01/2001
Exec Dt:
09/01/2001
Exec Dt:
09/05/2001
Exec Dt:
09/03/2001
Assignee:
SUWON-CITY
416, MAETAN-DONG, PALDAL-GU
KYUNGKI-DO, KOREA, REPUBLIC OF
Correspondent:
JONES VOLETINE, PLLC
SUSAN S. MORSE
1220 SUNRISE VALLEY DRIVE, SUITE 150
RESTON, VA 20191

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