Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10052549
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Filing Dt:
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01/23/2002
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Publication #:
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Pub Dt:
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08/01/2002
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Inventors:
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Akihiko Ebina, Yutaka Maruo
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING NONVOLATILE SEMICONDUCTOR MEMORY DEVICES HAVING CONTROL GATES CONNECTED TO COMMON CONTACT SECTION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 4-1, NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU |
| TOKYO, JAPAN |
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| 169 MYERS CORNERS RD. |
| WAPPINGERS FALLS, NEW YORK 12590 |
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| OLIFF & BERRIDGE, PLC |
| JAMES A. OLIFF |
| P.O. BOX 19928 |
| ALEXANDRIA, VIRGINIA 22320 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 4-1, NISHISHINJUKU 2-CHOME |
| SHINJUKU-KU |
| TOKYO-TO, JAPAN |
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| MICHAEL T. GABRIK |
| EPSON RESEARCH & DEVELOPMENT, INC. |
| 214 DEVCON DRIVE |
| SAN JOSE, CA 95112 |
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