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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
09/02/2003
Application #:
09876189
Filing Dt:
06/05/2001
Publication #:
Pub Dt:
09/26/2002
Inventors:
Gilbert C. Sih, Qiuzhen Zou, Inyup Kang, Prashant A. Kantak, Charles E. Sakamaki et al
Title:
MULTIPLE-DATA BUS ARCHITECTURE FOR A DIGITAL SIGNAL PROCESSOR USING VARIABLE-LENGTH INSTRUCTION SET WITH SINGLE INSTRUCTION SIMULTANEOUS CONTROL
Assignment: 1
Reel/Frame:
014212/0579Recorded: 06/26/2003Pages: 7
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
10/05/2001
Exec Dt:
10/01/2001
Exec Dt:
10/05/2001
Exec Dt:
10/05/2001
Exec Dt:
09/27/2001
Exec Dt:
10/05/2001
Exec Dt:
09/27/2001
Exec Dt:
10/01/2001
Exec Dt:
06/02/2003
Exec Dt:
10/01/2001
Exec Dt:
06/06/2003
Exec Dt:
09/27/2001
Assignee:
5775 MOREHOUSE DRIVE
SAN DIEGO, CALIFORNIA 92121-1714
Correspondent:
QUALCOMM INCORPORATED
ATTN: PHILIP WADSWORTH
PATENT DEPARTMENT
5775 MOREHOUSE DRIVE
SAN DIEGO, CALIFORNIA 92121-1714

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