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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
09/19/2006
Application #:
10160098
Filing Dt:
06/04/2002
Publication #:
Pub Dt:
12/12/2002
Inventors:
Takashi Nakano, Satoshi Shiraki, Yutaka Fukuda, Nobumasa Ueda, Shoji Miura
Title:
POWER MOS TRANSISTOR HAVING CAPABILITY FOR SETTING SUBSTRATE POTENTIAL INDEPENDENTLY OF SOURCE POTENTIAL
Assignment: 1
Reel/Frame:
012966/0589Recorded: 06/04/2002Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
05/27/2002
Exec Dt:
05/28/2002
Exec Dt:
05/27/2002
Exec Dt:
05/28/2002
Exec Dt:
05/28/2002
Assignee:
KARIYA-CITY
1-1, SHOWA-CHO
AICHI-PREF. 448-0029, JAPAN
Correspondent:
LAW OFFICES OF DAVID G. POSZ
DAVID G. POSZ
2000 L ST., NW., STE. 200
WASHINGTON, DC 20036

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