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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
10116128
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
12/19/2002
Inventors:
Laung-Terng Wang, Shyh-Horng Lin, Chi-Chan Hsu, Xiaoqing Wen, Anthony M. Vu, Yo Han Park et al
Title:
Method and system to optimize test cost and disable defects for scan and BIST memories
Assignment: 1
Reel/Frame:
013178/0271Recorded: 07/19/2002Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
05/30/2002
Exec Dt:
05/21/2002
Exec Dt:
06/04/2002
Exec Dt:
05/31/2002
Exec Dt:
05/30/2002
Exec Dt:
05/21/2002
Exec Dt:
05/21/2002
Assignee:
505 S. PASTORIA AVENUE SUITE 101
SUNNYVALE, CALIFORNIA 94086
Correspondent:
JIM ZEGEER
801 N. PITT STREET
SUITE 108
ALEXANDRIA, VA 22314

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