Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10311216
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Filing Dt:
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12/16/2002
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Publication #:
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Pub Dt:
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07/17/2003
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Inventor:
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Simon Deleonibus
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Title:
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Vertical MOS transistor with buried gate and method for making same
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 13-33 RUE DE LA FEDERATION |
| 75752 PARIS 15EME, FRANCE |
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| OBLON SPIVAK ET AL |
| 1940 DUKE ST |
| ALEXANDRIA VA 22314 |
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