Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10208110
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Filing Dt:
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07/29/2002
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Publication #:
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Pub Dt:
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10/02/2003
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Inventors:
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Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka
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Title:
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Compacted test plan generation for integrated circuit testing, test sequence generation, and test
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 17-2, SHIN YOKOHAMA 3-CHOME, KOUHOKU-KU |
| YOKOHAMA-SHI, KANAGAWA 222-0033, JAPAN |
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| CHRISTIE, PARKER & HALE, LLP |
| D. BRUCE PROUT |
| P.O. BOX 7068 |
| PASADENA, CA 91109-7068 |
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