Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10418167
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Filing Dt:
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04/18/2003
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Publication #:
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Pub Dt:
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11/20/2003
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Inventors:
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Syouichi Tanigashira, Hiroshi Baba
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Title:
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Phase-locked loop circuit
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU |
| KAWASAKI-SHI, KANAGAWA, JAPAN 211-8588 |
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| ARENT FOX KINTNER, ET AL. |
| CHARLES M. MARMELSTEIN |
| 1050 CONNECTICUT AVENUE, N.W. |
| SUITE 400 |
| WASHINGTON, DC 20036-5339 |
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