Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10393921
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Filing Dt:
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03/24/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Inventors:
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Yoshihiro Iwai, Tatsuki Ishii, Kenji Shigeoka, Hirotake Tokuyama
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Title:
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DELAY DIAGNOSIS METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT, COMPUTER PROGRAM PRODUCT FOR DIAGNOSING DELAY OF SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER READABLE RECORDING MEDIUM RECORDING PROGRAM THEREON
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 6, KANDA SURUGADAI 4-CHOME CHIYODA-KU |
| TOKYO, JAPAN |
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| 456, SAKAI, NAKAI-MACHI, ASHIGARAKAMI-GUN |
| KANAGAWA, JAPAN |
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| MATTINGLY, STANGER & MALUR, P.C. |
| JOHN R. MATTINGLY |
| 1800 DIAGONAL ROAD, SUITE 370 |
| ALEXANDRIA, VA 22314 |
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Assignment:
2
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MERGER (SEE DOCUMENT FOR DETAILS).
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| 393, TOTSUKA-CHO, TOTSUKA-KU, KANAGAWA |
| YOKOHAMA-SHI, JAPAN |
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| ANTONELLI, TERRY, STOUT & KRAUS, LLP |
| 1300 N. 17TH ST., SUITE 1800 |
| ARLINGTON, VA 22209 |
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Assignment:
3
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MERGER (SEE DOCUMENT FOR DETAILS).
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| 2-3-3, MINATOMIRAI, NISHI-KU, KANAGAWA |
| YOKOHAMA-SHI, JAPAN |
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| ANTONELLI, TERRY, STOUT & KRAUS, LLP |
| 1300 N. 17TH ST. , SUITE 1800 |
| ARLINGTON, VA 22209 |
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