Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10330427
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Filing Dt:
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12/30/2002
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Publication #:
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Pub Dt:
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02/05/2004
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Inventors:
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Kwang-ok Jeong, Hyo-sig Won
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Title:
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CLOCKED-SCAN FLIP-FLOP FOR MULTI-THRESHOLD VOLTAGE CMOS CIRCUIT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 416, MAETAN-DONG, PALDAL-GU |
| SUWON-CITY, KYUNGKI-DO, KOREA, REPUBLIC OF |
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| HARNESS, DICKEY & PIERCE, P.L.C. |
| THOMAS S. AUCHTERLONIE |
| P.O. BOX 8910 |
| RESTON, VA 20195 |
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Assignment:
2
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SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
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| ELEVEN MADISON AVENUE |
| NEW YORK, NEW YORK 10010 |
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| JONATHAN SEIDEN, ESQ. |
| SKADDEN, ARPS, SLATE, MEAGHER |
| & FLOM LLP |
| FOUR TIMES SQUARE |
| NEW YORK, NEW YORK 10036 |
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Assignment:
3
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CORRECTION TO A PROPERTY NUMBER
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| ELEVEN MADISON AVENUE |
| NEW YORK, NEW YORK 10010 |
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| JONATHAN SEIDEN, ESQ. |
| SKADDEN, ARPS, SLATE, ET AL. |
| FOUR TIMES SQUARE |
| NEW YORK, NEW YORK 10036 |
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