Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10606225
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Filing Dt:
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06/26/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Inventor:
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Hideaki Watanabe
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Title:
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Clock multiplying PLL circuit
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, MAKIKDANAKA 4-CHOME, NAKAHARA-KU |
| KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN |
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| ARENT FOX KINTNER PLOTKIN & KAHN PLLC |
| CHARLES M. MARMELSTEIN |
| 1050 CONNECTICUT AVENUE, N.W., SUITE 400 |
| WASHINGTON, D.C. 20036-5339 |
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Assignment:
2
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RE-RECORD TO CORRECT THE ASSIGNEE ON A PREVIOUS RECORDING ON JUNE 26, 2003 AT REEL 014265 FRAME 0144 (ASSIGNMENT)
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| 1-1, KAMIKODANAKA 4-CHOME, MAKAHARA-KU |
| KAWASAKI-SHI |
| KANAGAWA 211-8588, JAPAN |
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| ARENT FOX KINTNER PLOTKIN ET AL. |
| CHARLES M. MARMELSTEIN |
| 1050 CONNECTICUT AVENUE, N.W., SUITE 400 |
| ASHINGTON, DC 20036-5339 |
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