Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
10700451
|
Filing Dt:
|
11/05/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/20/2004
| | | | |
|
Inventors:
|
Hidefumi Natsume, Yasutaka Yamashita
|
|
Title:
|
LAYER 2 SWITCH AND METHOD OF PROCESSING EXPANSION VLAN TAG OF LAYER 2 FRAME
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 7-1, SHIBA 5-CHOME MINATO-KU |
| TOKYO, JAPAN |
|
|
|
|
| YOUNG & THOMPSON |
| BENOIT CASTEL |
| 745 S. 23RD STREET, 2ND FLOOR |
| ARLINGTON, VA 22202 |
|
|
Search Results as of:
05/09/2024 10:23 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
