Patent Assignment Abstract of Title
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For pending or abandoned applications please consult USPTO staff.
Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10724603
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Filing Dt:
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12/02/2003
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Publication #:
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Pub Dt:
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06/24/2004
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Inventors:
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Hirohisa Saito, Takashi Tsuno, Chihiro Kawai, Shinya Nishida, Motoyoshi Tanaka
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Title:
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Package for housing semiconductor chip, fabrication method thereof and semiconductor device
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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CHUO-KU, OSAKA-SHI |
OSAKA, JAPAN |
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23-5, KITAUENO 2-CHOME |
TAITO-KU, TOKYO, JAPAN |
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MCDERMOTT, WILL & EMERY |
ARTHUR L. STEINER |
600 13TH STREET, N.W. |
WASHINGTON, D.C. 20005-3096 |
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Assignment:
2
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SUMITOMO ELECTRIC INDUSTRIES, LTD. IS ASSIGNING THEIR 50% TO A.L.M.T. CORPORATION AND TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL 014757 FRAME 0351
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23-5 KITAUENO 2-CHOME |
TAITO-KU, TOKYO, JAPAN |
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MCDERMOTT WILL & EMERY LLP |
600 13TH STREET, N.W. |
WASHINGTON, D.C. 20005-3096 |
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05/02/2024 01:30 PM
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