Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10471972
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Filing Dt:
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04/26/2004
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Publication #:
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Pub Dt:
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09/09/2004
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Inventors:
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Navakanta Bhat, Mukherjee Sugato
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Title:
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YIELD AND SPEED ENHANCEMENT OF SEMICONDUCTOR INTEGRATED CIRCUITS USING POST FABRICATION TRANSISTOR MISMATCH COMPENSATION CIRCUITRY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| BANGALORE-560 012 |
| KAMATAKA STATE, INDIA |
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| GRAY CARY WARE & FREIDENRICH |
| TIMOTHY W. LOHSE |
| 2000 UNIVERSITY AVE. |
| EAST PALO ALTO, CA 94303 |
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