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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
7024638
Issue Dt:
04/04/2006
Application #:
10621114
Filing Dt:
07/14/2003
Publication #:
20050015739
Pub Dt:
01/20/2005
Inventors:
Louis K. Scheffer, Kenji Yoshida, Yoshikuni Abe, Aki Fujimura, Robert C. Pack
Title:
METHOD FOR CREATING PATTERNS FOR PRODUCING INTEGRATED CIRCUITS
Assignment: 1
Reel/Frame:
014290/0170Recorded: 01/26/2004Pages: 9
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
SCHEFFER, LOUIS K.
Exec Dt:
01/07/2004
YOSHIDA, KENJI
Exec Dt:
01/08/2004
ABE, YOSHIKUNI
Exec Dt:
01/08/2004
FUJIMURA, AKI
Exec Dt:
01/09/2004
PACK, ROBERT C.
Exec Dt:
01/16/2004
Assignee:
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE
SAN JOSE, CALIFORNIA 95134
Correspondent:
BINGHAM MCCUTCHEN LLP
PETER C. MEI
THREE EMBARCADERO, SUITE 1800
SAN FRANCISCO, CA 94111-4067
Assignment: 2
Reel/Frame:
014939/0918Recorded: 01/29/2004Pages: 9
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
SCHEFFER, LOUIS K.
Exec Dt:
01/07/2004
YOSHIDA, KENJI
Exec Dt:
01/08/2004
ABE, YOSHIKUNI
Exec Dt:
01/08/2004
FUJIMURA, AKI
Exec Dt:
01/09/2004
PACK, ROBERT C.
Exec Dt:
01/16/2004
Assignee:
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE
SAN JOSE, CALIFORNIA 95134
Correspondent:
BINGHAM MCCUTCHEN LLP
PETER C. MEI
THREE EMBARCADERO, STE. 1800
SAN FRANCISCO, CA 94111-4067

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