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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
05/13/2008
Application #:
10744056
Filing Dt:
12/23/2003
Publication #:
Pub Dt:
03/17/2005
Inventors:
Michael Sommer, Gerhard Enders
Title:
DRAM MEMORY WITH VERTICALLY ARRANGED SELECTION TRANSISTORS
Assignment: 1
Reel/Frame:
015350/0630Recorded: 11/10/2004Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/06/2004
Exec Dt:
09/09/2004
Assignee:
ST.-MARTIN-STR. 53
MUNICH, GERMANY 81669
Correspondent:
MOSER, PATTERSON & SHERIDAN, LLP
INFINEON
3040 POST OAK BLVD.,
SUITE 1500
HOUSTON, TX 77056
Assignment: 2
Reel/Frame:
023821/0535Recorded: 01/15/2010Pages: 393
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
04/25/2006
Assignee:
GUSTAV-HEINEMANN-RING 212
MUNICH, GERMANY 81739
Correspondent:
JONATHAN BOCKMAN
C/O MORRISON AND FOERSTER LLP
1650 TYSONS BLVD. SUITE 400
MCLEAN, VA 22102

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