Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
2
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10895821
|
Filing Dt:
|
07/22/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/21/2005
| | | | |
|
Inventors:
|
Yoichi Matsumura, Takako Ohashi, Katsuya Fujimura, Chihiro Itoh, Hiroki Taniguchi
|
|
Title:
|
Method for processing design data of semiconductor integrated circuit
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 1006, OAZA KADOMA, KADOMA-SHI |
| OSAKA, JAPAN 571-8501 |
|
|
|
|
| MCDERMOTT WILL & EMERY LLP |
| MICHAEL E. JOGARTY |
| 600 13TH STREET, N.W. |
| WASHINGTON, D.C. 20005-3096 |
|
|
|
Assignment:
2
|
|
|
|
|
|
|
RE-RECORD TO CORRECT ASSIGNOR AND ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL/FRAME 015626/0565
|
|
|
|
|
|
|
|
|
| 1006, OAZA KADOMA |
| KADOMA-SHI, OSAKA, JAPAN 571-8501 |
|
|
|
|
| MCDERMOTT WILL & EMERY LLP |
| 600 13TH STREET, N.W. |
| WASHINGTON, D.C. 20005-3096 |
|
|
Search Results as of:
04/28/2024 05:04 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
