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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
10/09/2007
Application #:
10503940
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
05/19/2005
Inventors:
Tetsuo Yoshida, Yoshiaki Sasaki, Hiroaki Saeki, Yasushi Taniyama, Hiroshi Takizawa
Title:
PORT STRUCTURE IN SEMICONDUCTOR PROCESSING SYSTEM
Assignment: 1
Reel/Frame:
015982/0456Recorded: 11/12/2004Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
08/05/2004
Exec Dt:
08/05/2004
Exec Dt:
08/05/2004
Exec Dt:
08/05/2004
Exec Dt:
08/05/2004
Assignee:
3-6, AKASAKA 5-CHOME, MINATO-KU
TOKYO 107-8481, JAPAN
Correspondent:
OBLON, SPIVAK, MCCLELLAND, MAIER & NEUST
1940 DUKE STREET
ALEXANDRIA, VA 22314

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